CodiLime
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Capability

Acceleration & Offloading

We move networking, security, and dataplane processing off host CPUs and onto DPUs, SmartNICs, and GPUs. You get your cores back, plus the microsecond latency and line-rate throughput that AI-ready data centers need. We do both halves of the job: the drivers down at the silicon and the integration up in Kubernetes and OpenStack.

Measured impact

What we deliver

  • Dataplane and software router acceleration

    We offload high-performance software routers onto SmartNIC and DPU hardware. DPDK, FD.io VPP, and Tungsten Fabric run at line rate with microsecond latency.

    Read the case study →

  • AI security and threat inspection offloading

    We offload CPU-intensive security workloads, such as inline AI-driven WAFs and ML-based SYN flood defenses, directly to DPU and GPU hardware using zero-copy GPUDirect RDMA pipelines.

    Read the case study →

  • Programmable dataplanes with P4 & eBPF

    We develop custom P4 firmware and eBPF FPGA softcores integrated with SDN controllers via P4Runtime and gRPC to execute real-time, hardware-level packet processing.

    Read the case study →

  • Bare-metal drivers and custom OS engineering

    We build custom C/C++ PCIe drivers, DPDK Poll Mode Drivers (PMDs), and Yocto-based embedded Linux. Each one is built for the specific accelerator or white-box appliance.

    Read the case study →

  • SmartNIC & DPU cloud integration

    We develop custom Kubernetes CNI plugins, Multus chaining, and OpenStack drivers. They expose hardware acceleration to cloud-native environments without special handling.

    Read the case study →

How we do it

We take a layered engineering approach. We work from the silicon up to cloud-native orchestration, and we validate every layer on the way.

  1. Bottleneck analysis and architecture design

    CPU and network profiling across AI and hybrid cloud · Zero-copy, kernel-bypass paths · Targets: DPU, SmartNIC, FPGA, GPU

  2. Deterministic benchmarking and automated QA

    Validates throughput and latency predictability · RFC 2544 test environments · TRex and Ixia · Integrated into CI/CD pipelines

    1. Silicon and dataplane engineering

      Eliminates OS jitter and CPU thrashing

      Low-level C and C++ PCIe drivers · DPDK PMDs · P4 firmware · eBPF softcores · NUMA-aware memory management

    2. Hardware abstraction and control plane

      Interfaces offloaded logic with SDN controllers through open, standardized APIs

      P4Runtime · gRPC · DOCA · SONiC-DASH

    3. Cloud orchestration and integration

      Exposes hardware acceleration to containerized and virtualized workloads

      Custom Kubernetes CNI plugins · Multus chaining · SR-IOV device plugins · OpenStack ML2 drivers

    Every build re-validates all three layers before it ships.

    Your containerized and virtualized workloads

Technology

  • Hardware and silicon accelerators

    • NVIDIA BlueField DPU
    • AMD Pensando
    • Intel IPU
    • Agilio SmartNIC
    • NVIDIA GPU

  • Kernel bypass and dataplanes

    • DPDK
    • eBPF
    • XDP
    • Tungsten Fabric
    • Open vSwitch
    • VPP

  • Programmability, frameworks and APIs

    • P4
    • P4Runtime
    • DOCA
    • CUDA
    • gRPC
    • SONiC-DASH
    • OpenConfig
    • Open Programmable Infrastructure
    • gNMI

  • Orchestration, OS and virtualization

    • Kubernetes
    • Multus
    • SR-IOV
    • OpenStack
    • ML2
    • TripleO
    • Yocto Linux
    • BuildRoot
    • vDPA
    • virtio
    • VFIO

Proof of capability

Why CodiLime

  • Deep silicon-to-cloud integration

    We bridge the gap between low-level C/C++ hardware drivers and modern cloud orchestration platforms. Our engineers write custom PCIe drivers, DPDK PMDs, and P4 firmware while simultaneously building custom Kubernetes CNI plugins and OpenStack ML2 drivers.

  • Multi-vendor accelerator expertise

    We maintain deep, hands-on engineering experience across NVIDIA BlueField DPUs, AMD Pensando, Intel IPUs, Agilio SmartNICs, and custom FPGAs. We build upon vendor-agnostic standards like Open Programmable Infrastructure (OPI), SONiC-DASH, and P4Runtime to eliminate proprietary silicon lock-in.

  • Production dataplane and software router mastery

    We offload DPDK, FD.io VPP, and Tungsten Fabric to hardware without giving up centralized SDN control. NUMA-aware memory allocation and worker-thread core pinning remove cache line pressure, TLB thrashing, and OS jitter.

  • Deterministic benchmarking and automated testing

    We eliminate OS jitter, CPU frequency scaling interference, and NUMA memory latency to perform deterministic hardware performance validation. Our automated CI/CD test frameworks leverage TRex traffic generators and RFC 2544 benchmarking methodologies to systematically verify microsecond latency and zero-drop throughput.

  • From PoC to production

    We take next-generation architectures all the way into production. Our teams have built zero-copy GPUDirect RDMA pipelines for inline AI threat detection and runtime eBPF bytecode injection on cloud FPGAs.

Insights

FAQ

Good to know

  • How do you avoid vendor lock-in across different DPU and SmartNIC hardware?

    We build hardware-agnostic control planes on open standards: Open Programmable Infrastructure, P4Runtime, gRPC and SONiC-DASH. Orchestration stays separate from the low-level silicon drivers, so the same policies run across NVIDIA BlueField, AMD Pensando, Intel IPUs and custom FPGAs. You keep your SDN and cloud policies and you keep the option to change hardware.

  • Can hardware offloading integrate into our existing Kubernetes or OpenStack environments?

    Yes. We develop custom Kubernetes CNI plugins, Multus chaining drivers and OpenStack Neutron ML2 extensions that expose acceleration directly to workloads. Offload agents and gRPC sidecars take over pod routing and stateful filtering. Your platform team keeps its Helm charts and OpenStack templates.

  • What core savings can we expect?

    On an SDN dataplane we took host CPU allocation from 18 cores down to 2, and throughput up 44% at the same time. Latency dropped by up to 100x in some use cases. Results depend on your traffic profile and hardware, so we start by profiling yours.

  • Do we need to rewrite our networking software to use hardware offloading?

    Usually not. We use kernel bypass with DPDK or eBPF and XDP, or socket interception, to divert traffic to hardware without touching the application. For MQTT we bypassed the host TCP stack and handled the protocol on a DPU, with no application refactoring. Where custom logic is needed, we write P4 firmware or drivers in C and C++ that sit behind your existing stack.

  • How do you prove that offloading won’t add packet drops or latency jitter under load?

    We test in environments where OS jitter, CPU frequency scaling and NUMA memory latency are removed, so numbers are repeatable. We use RFC 2544 methodology with TRex traffic generators, wired into CI/CD. Every firmware or software release is re-checked for zero-drop throughput and latency predictability before it ships.

  • How does offloading help AI data center workloads specifically?

    East-west traffic in AI clusters loads host CPUs with packet encapsulation, ACL filtering and threat inspection. We move the dataplane and inline AI security onto DPUs and GPUs over GPUDirect RDMA, so packets pass between accelerators without the host CPU. That keeps GPUs working on training and inference instead of waiting.

  • How do you handle long-term maintenance when DPDK or vendor SDK updates occur?

    We provide full lifecycle software adaptation, driver maintenance, and automated regression testing. Our engineering teams manage API version upgrades across DPDK, Linux kernel modules, and vendor SDKs (such as NVIDIA DOCA or P4 compilers) while validating firmware bitstream compatibility. We integrate these build pipelines into Jenkins automated test environments to guarantee long-term system stability.

Tell us what you’re trying to speed up.

A bottleneck, a hardware decision, or a question about something on this page. Send it over and we’ll get back to you.