ABOUT THE AUTHOR

Daniel Jędrzejczyk

Senior Software Engineer

Daniel is a Senior Software Engineer with nearly 20 years of experience in the tech industry. His expertise lies in developing and designing embedded services. Over his career, Daniel has become a specialist in a range of advanced fields, most notably in FPGA and embedded systems. His in-depth knowledge of FPGA technology has enabled him to create high-performance and flexible solutions for various applications. With a background in the automotive and aerospace industry, Daniel has a profound understanding of low-level programming.

Daniel  Jędrzejczyk

CONNECT WITH DANIEL JĘDRZEJCZYK

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Recent posts by Daniel :

Thumbnail of an article about From simulation to hardware: effective debugging techniques in HDL
SOFTWARE DEVELOPMENT

From simulation to hardware: effective debugging techniques in HDL

Debugging hardware description languages (HDL) such as VHDL and Verilog presents unique challenges compared to traditional software debugging. Let us show you how to do it.
Thumbnail of an article about From Algorithms to FPGA Hardware. Understanding High-Level Synthesis (HLS)
SOFTWARE DEVELOPMENT

From Algorithms to FPGA Hardware. Understanding High-Level Synthesis (HLS)

FPGAs (field programmable gate arrays) are increasing in popularity due to their flexibility and adaptability in various applications such as signal processing, machine learning, and networking. However, programming FPGAs can be difficult due to the low-level hardware description languages required.