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Low-level programming is machine-oriented and sits close to computer peripherals. Low-level programming allows the programmer to adapt the processor to precise minimum memory usage requirements while maintaining high performance.

Thumbnail of an article about From simulation to hardware: effective debugging techniques in HDL
SOFTWARE DEVELOPMENT

From simulation to hardware: effective debugging techniques in HDL

Debugging hardware description languages (HDL) such as VHDL and Verilog presents unique challenges compared to traditional software debugging. Let us show you how to do it.
Daniel Jędrzejczyk

Daniel Jędrzejczyk

Thumbnail of an article about From Algorithms to FPGA Hardware. Understanding High-Level Synthesis (HLS)
SOFTWARE DEVELOPMENT

From Algorithms to FPGA Hardware. Understanding High-Level Synthesis (HLS)

FPGAs (field programmable gate arrays) are increasing in popularity due to their flexibility and adaptability in various applications such as signal processing, machine learning, and networking. However, programming FPGAs can be difficult due to the low-level hardware description languages required.
Daniel Jędrzejczyk

Daniel Jędrzejczyk

Thumbnail of an article about The Next Evolution in Storage: Understanding NVMe over Fabrics (NVMeoF)
SOFTWARE DEVELOPMENT

The Next Evolution in Storage: Understanding NVMe over Fabrics (NVMeoF)

This article will delve into how those technologies are bridged with NVMeoF.
Jan Zieleźnicki

Jan Zieleźnicki

Thumbnail of an article about SmartNIC vs. NIC: what is the difference?
SOFTWARE DEVELOPMENT
NETWORKS

SmartNIC vs. NIC: what is the difference?

Our everyday life is full of networking devices and applications. When we video conference at work or watch a new movie on a streaming service at home, we barely even think about how much data needs to be transferred to ensure their correct function. We use our mobile devices with high-speed Internet access and take that for granted. But underneath the efficient work of online applications lies the stable functioning of enormous data centers and telecommunication infrastructure. Since the amount of data that needs to be processed grows every day, we keep demanding more and more processing capabilities from the networking infrastructure.
Artur Jaworski

Artur Jaworski

Thumbnail of an article about An immersion in networking technologies: CodiLime's summary of the 2023 SmartNICs Summit
SOFTWARE DEVELOPMENT
NETWORKS

An immersion in networking technologies: CodiLime's summary of the 2023 SmartNICs Summit

The SmartNICs Summit 2023 is already behind us. The CodiLime team took the opportunity to attend and actively participate in engaging talks and insightful panels during this event. The SmartNICs Summitbrought together industry leaders such as Intel, AMD, Arm, NVIDIA, Achronix, Marvell, VMWare, F5, and Juniper Networks, along with other companies involved in developing SmartNICs. The conference covered a wide range of interesting topics and emerging trends in the field. The conference placed a strong emphasis on the increasing adoption of SmartNICs and the urgent need for industry-wide standards.
Krzysztof Wróbel

Krzysztof Wróbel

Thumbnail of an article about Hardware offloading in software-defined networking
SOFTWARE DEVELOPMENT
NETWORKS

Hardware offloading in software-defined networking

Increasing demands on computer hardware means higher demand for network technology. Unfortunately, computer systems remain largely inefficient, with the CPU serving as the key engine in a variety of computer applications. To solve this problem, one could take various approaches: use a bigger computer, distribute the software between different computers, or improve its performance. In this article, we'll show you how a higher-end computing device can reduce CPU usage and the costs associated with hardware.
Multiple authors

Multiple authors

Thumbnail of an article about What does CUPS mean in networks and what are its benefits
NETWORKS

What does CUPS mean in networks and what are its benefits

CUPS stands for Control and User Plane Separation. This is an architectural concept which says that for a given network solution, the Control Plane (CP) and User Plane (UP) functions are different entities. To read more on what Management, Control and User Planes (a.k.a Data Plane, or DP) are see Management vs. Control vs. Data Planes in a Network Device. But what does it mean in practice and where is the CUPS model implemented? What benefits does it bring compared to a combined model? The first thing that comes to mind when discussing CUPS is a mobile network or, more precisely, a mobile packet core.
Monika Antoniak

Monika Antoniak

Thumbnail of an article about The upcoming SmartNICs Trends for 2023
SOFTWARE DEVELOPMENT

The upcoming SmartNICs Trends for 2023

Modern network infrastructure is in a state of constant evolution to meet the ever-growing demand for improvements in fields like connectivity parameters, infrastructure flexibility, or overall power consumption. Innovators on the market are trying to answer all those needs, and with this article, we would like to shed light on some of the trends resulting from those efforts. SmartNICs extend the boring NIC domain with “smart” elements. Different platforms can define their “smart” elements differently, but overall, those elements aim to improve the general parameters of network connections, reduce power consumption, and increase the flexibility of network infrastructure.
Artur Jaworski

Artur Jaworski

Thumbnail of an article about FPGA in network solutions: benefits and usage examples
SOFTWARE DEVELOPMENT
NETWORKS

FPGA in network solutions: benefits and usage examples

Silicon chips are a well-known and traditional resource often used in projects. However, sometimes they can be insufficiently flexible – here, the FPGA comes in. This solution is gaining popularity as FPGAs provide more options for customization. If you are looking for more information about FPGAs, their strengths, and in which types of projects FPGAs will work better than other solutions, this article provides the answers. We also offer examples of how we have used FPGAs in our clients’ projects. A small annotation: to better distinguish FPGAs from silicon chips, the term “silicon solution” is used in the article.
Multiple authors

Multiple authors

Thumbnail of an article about Improving ACL’s processing performance with GPU — comparison with VPP
NETWORKS
SOFTWARE DEVELOPMENT

Improving ACL’s processing performance with GPU — comparison with VPP

In computer networks, with the development of new methods, some specific and well-known problems, at first small and manageable, in time grow and become much more difficult to solve. Then they require smarter algorithms, better hardware and a lot of computing power.Access Control List (ACL) processing is a great example of this. This problem has been well known in computer networks for several decades. Typically, ACLs were relatively small - a few dozen entries max - and were used for simple network traffic filtering.
Michał Niciejewski

Michał Niciejewski

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